1. Field of the Invention
The present invention relates to an amplifier circuit, and particularly to an amplifier circuit, which has a main stage amplifier and at least one secondary stage amplifier, so that the amplifier circuit allows to switch between the main stage amplifier and the secondary stage amplifier in dependency on the input signal.
2. Description of Prior Art
In low-noise high frequency amplifiers with high amplification, which are referred to as LANs (LAN=low noise amplifier), it is very important to provide as little load as possible to the high frequency input. If, however, several amplification stages are required, between which a switch-over can be performed, as it can be particularly the case in the field of mobile telecommunication and there, particularly, with mobile telephones, they also have to be coupled to the RF input. These secondary stages generate a capacity in parallel to the main stage, and thus reduce the performance of the main stage. The same problem holds true, in a slightly reduced form, for the output side of the amplifier arrangement, since the secondary stage of several secondary stages are connected in parallel between the RF input and the RF output.
In such a multi-stage RF amplifier, where several amplification stages are connected in parallel to different amplification, it is possible to switch over between the different amplification stages depending on the input signal level, to avoid overriding of the individual stages. In such LANs with several amplification stages connected in parallel it is necessary that independent of which amplification stage is connected between the RF input and the RF output, an input matching and output matching, respectively, usually to 50 ohm, is guaranteed.
One example of a main stage of an RF amplifier 10 according to the prior art is shown in FIG. 1. The main stage amplifier comprises a bipolar transistor VT1, whose base terminal is connected to an RF input HFin. The emitter terminal of the transistor VT1 is connected to ground. The collector terminal of the transistor VT1 is connected to an RF output HFout via a decoupling capacitor VC1. Further, the collector of the transistor VT1 is connected to a supply voltage potential Vcc via a resistor VR1 and an inductance VL1. Another resistor VR2 is connected between the collector terminal and the base terminal of the main stage transistor VT1. The resistor VR2 serves for the operating point setting of the main stage transistor VT1, while the capacitor VC1 serves for DC decoupling and the inductance VL1 as RF choke. The resistor VR1 and the inductance VL1 are further operative as load for the bipolar transistor VT1. A so-called LC sump, which has an external inductivity Lext and an external capacity Cext is preferably provided at the RF input of the main stage amplifier 10. This LC sump serves to reduce distortions due to the IIP3 (IIP3=input intercept point 3).
To avoid an override of such a main stage amplifier at a high input signal level, whose elements are dimensioned to provide a high amplification of input signal from the RF input to the RF output, it is known to use so-called gain step circuits. These can be passive or active. Passive gain step circuits do not provide an amplification between the RF input and the RF output, when they are switched on. In such passive realizations, however, one has to live with the fact that the reverse insulation is identical to a forward attenuation.
Still, in the past, active gain step circuits have been avoided, wherein, if active gain step stages have been realized, nevertheless, they had been mostly implemented in a similar way to the embodiment shown in FIG. 2.
The gain step circuit 20 shown in FIG. 2, which can be referred to as secondary stage amplifier, comprises a transistor T1, whose collector terminal is connected to the main stage amplifier at a switching node 22 (see also FIG. 1), i.e. high frequency-coupled to the RF output HFout. The emitter terminal of the transistor T1 is connected to a reference potential, normally ground, via a resistor R1. The base terminal of the transistor T1 is connected to a bias terminal 26 via a bias resistor VR1, and to the RF input HFin via a capacity 24, which enables the separate DC biasing of the base terminal of the transistor T1. Thus, the gain step circuit 20 shown in FIG. 1 is connected in parallel to the main stage amplifier 10 shown in FIG. 1 between the RF input HFin and the RF output HFout. Since the collector terminal of the transistor T1 is coupled to the RF output at the circuit node 22, i.e. prior to the decoupling capacitor VC1, an appropriate supply voltage is applied to the transistor T1 via the resistor VR1 and inductance VL1. The secondary stage amplifier shown in FIG. 1 is thereby designed to provide a smaller amplification than the main stage amplifier, so that a switch-over to the secondary stage amplifier can be performed at a high-level input signal to avoid overriding of the main stage amplifier.
However, a disadvantage of the above described solution is that the main stage is significantly loaded with the capacities of the transistor T1 in a range of 200 to 400 fF at the RF input. This leads to a significant deterioration of the performance of the main stage amplifier with regard to amplification and noise performance.